For the last 40 years there has been ongoing development of semiconductor radiation detectors to achieve increased sensitivity, higher energy resolution, lower electronic noise and larger active area. The last 10 years has seen the emergence of a new type of commercially available detector, the “silicon drift detector” (SDD) which differs from previous types of detector such as PIN diodes and lithium-compensated (Si(Li)) detectors by virtue of having an anode capacitance typically less than 0.2 pF. This SDD capacitance is more than an order of magnitude smaller than that of the previous types.
For best detection results, it is important to optimise the interface between the detector and readout electronics and in particular the connection to the field effect transistor, FET, that is used to form the first amplification stage. The noise performance of the detector and FET combination depends on the total capacitance “seen” at the gate of the FET. This includes the detector capacitance, the input capacitance of the FET and any other capacitances effectively connected to the gate (see for example, Sonsky et al Nucl.Instrum.and Methods in Physics Research A 517, 2004, 301-312, eqn.2 and section 5.1).
For many years, discrete FETs have been commercially available that offer high gain and excellent noise performance and are ideal for use with PIN diode and
Si(Li) detectors. These FETs typically have capacitances below 1 pF (see for example the URL http:mw.moxtek.comifetsultra-low-noise-jfets.html and the associated “N-Channel Ultra-Low Noise JFETS CATALOG”).
Discrete FETs can in principle be made with much smaller input capacitance than 1 pF but when the FET input capacitance is reduced by shrinking the dimensions of the FET, this also reduces the FET gain. Therefore, for optimum performance with a particular type of FET, the input capacitance of the FET needs to be close to the sum of detector capacitance and all other capacitances effectively connected to the gate. The gate contact for a discrete FET needs to be connected to the detector and this is commonly achieved by using standard wire bonding techniques where a short wire is bonded at one end to the readout anode of the detector and, at the other end, to the FET gate.
Round bond pads are used in a typical discrete FET designed for use in radiation detectors (see for example the “MX-30” discussed at the above URL). Each bond pad is a round structure connected by a thin “trace” (also called a “track”) to the required electrode (such as “substrate”, “feedback”, “source”, “drain”, “gate”, “reset”). In the industry such pads are normally made of aluminium metal using conventional semiconductor lithography and are placed on top of “field oxide” that is typically 1 micrometre thick which electrically insulates the metal pad from the silicon material beneath. In an n-channel JFET the silicon material underneath would typically be the p+ material of the substrate that is held at a fixed potential. The bond pad has to be large enough to make a wire bond connection using a “wedge” or “ball” bonder and for convenience, most non-critical bond pads will be around 100 micrometres in diameter. If a pad is made smaller it makes it harder to position the wire bond within the boundary of the pad. With commonly-available bonding equipment, it is difficult to work with bond pads that have diameter smaller than 70 micrometres.
The material beneath the oxide is effectively a ground plane for signals and a circular bond pad with 70 μm diameter on top of 1 micrometre of silicon dioxide gives an effective “parallel plate” capacitance to ground of 0.13 pF. Thus, for an SDD detector, the stray capacitance introduced by the critical gate bond pad can be larger than the detector capacitance. This stray capacitance effectively sets a lower limit on the capacitance of a discrete FET because in practice it is not worth reducing the dimensions of the discrete FET to the point where the reduction in noise, due to reduction in total capacitance, is outweighed by the increase in noise due to loss in gain of the FET.
In order to avoid the need for a bond pad and wire connection, the FET of the first amplifying stage can be integrated on to the same silicon as the detector chip (e.g. see the earlier cited reference Sonsky et al 2004). However, when this approach is used, it is difficult to design and fabricate a suitable FET that will produce the desired characteristics because the technological processes and materials for fabricating FETs with good amplification and noise properties are usually quite different from those that are required for semiconductor radiation detectors made on high resistivity silicon. Thus, the integration of the FET on the same substrate as the detector is highly desirable in principle but has some practical difficulties.
The difference between integrated and discrete FETs is well known. For example, Niculae et al Microsc Microanal 13(Suppl 2), 2007, point out (with reference to their FIG. 1b) that the bonding pad required for a discrete FET adds additional input capacitance.
Since there are some advantages in retaining a discrete FET, it would be desirable to find a way of avoiding the disadvantage of the parasitic bond pad capacitance associated with wire bonding. It is in this context that the invention is provided.